BMAC Architecture
Engineered from first principles for the specific demands of AI inference.
Turning CPUs in to the best inference engines without DRAM, BMAC is the new inference architecture for all models by Archality.
BMAC eliminates the constant movement of model weights from memory to compute units. Weights reside in-place, and compute flows through them, drastically reducing memory bandwidth dependency.
By removing the bottleneck of external memory access for weights, BMAC provides predictable, low-latency inference performance, critical for real-time services and mission-critical systems.
The design operates alongside general-purpose CPUs, augmenting them with a dedicated MAC substrate that eliminates heavy memory traffic during inference operations.
Reduced data movement directly translates to lower power consumption per inference, enabling higher deployment density within existing datacenter power and thermal envelopes.
The architecture is designed for versatility, with flexible integration pathways for rack-scale systems, OEM modules, and chiplet-based custom silicon.
Engineered to handle a wide range of model sizes and types, providing the flexibility needed for today's rapidly evolving AI landscape.